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Wind River ICE 2
JTAG Debugging for Multi-core
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The First JTAG Debugger Designed for Multi-core

Wind River ICE 2 is the first JTAG debugger optimized for visibility and control of your entire multi-core system. Embedded systems are getting more complex. Some run multiple operating systems over several cores, and in some cases these cores are supervised with Wind River Hypervisor. It’s critical that your JTAG debugger renders the entire system in one context (system level debugging of all application instances on many cores) all from a single JTAG debugging window. The ICE 2 JTAG debugger manages the hardware complexity behind the scenes, so you can focus on what matters most: tracking down bugs.

ICE 2 supports your current architecture and will extend with you into future architectures. Today ICE 2 supports the latest 32-bit and 64-bit processors based on leading architectures including ARM, Intel, MIPS, and PowerPC. And it's lab-ready, so your remote team members can access ICE 2 though a fast Gigabit Ethernet connection.

With ICE 2, you'll view operating system objects and set thread qualified breakpoints to pinpoint specific instances of logic running in your application. Set breakpoints on one or more cores, run diagnostic scripts, flash your board, and access key device information such as registers and cache.

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View the ICE 2 JTAG Debugger feature list for more details.

Watch the ICE 2 JTAG Debugger Video

 

Features

Multi-core Debugging

  • Simultaneously debug up to 16 CPU cores and 32 physical threads visualized in a single contextual interface.
  • Synchronized cross-core debug operations allow you to indentify difficult issues introduced with the complexity of a multi-core system.

System-Level Debugging

Allows the user to resolve complex interactions among kernel, kernel modules, and applications. SMP systems can be represented by treating groups of cores as a single system including TOS awareness, kernel, kernel module, and application debug.

Virtualized System Bring-Up

Visibility into the hypervisor's object and virtual boards enables bring-up of a virtualized system with multiple guest OSes.

Take Control of Your System

  • Start, stop, and reset your target.
  • Single step through code with a correlated source view.
  • Set expression-based hardware and software conditional breakpoints.
  • View and modify CPU core and peripheral registers with bit-level detail.
  • View and modify RAM, cache, and non-volatile memory; supports memory management unit (MMU).
  • Board initialization and target register files are provided for common device reference platforms.
  • Validate address, data bus, and memory with advanced hardware diagnostics.
  • Flash programming allows for quick system setup such as loading boot loader images into flash.
  • Automate target initialization and download sequences with command shell command-line interface (CLI).

High-Performance Hardware Debugger

  • Ethernet interface for remote debugging
  • Front-panel LCD to ease configuration and monitoring
  • Target console port
  • Support of up to 100MHz JTAG clock rates
  • User-selectable signal drive strength
  • Target adapter connector system

Highly Extensible Solution

  • Support for a wide range of processors based on ARM, Intel, MIPS, and PowerPC architectures
  • Eclipse-based development environment for integration with third-party and home-grown development tools
  • Centralized project-oriented environment to simplify workflow and ease handoff among different phases of development
  • External trace buffer unit to identify and resolve difficult program-flow issues
  • Multi-JTAG connect unit for debugging redundant systems

Above and Beyond Board Bring-Up

  • Target OS awareness provides kernel visibility for stabilization of the OS, kernel modules, and applications.
  • It is integrated and validated to work with the latest versions of Wind River VxWorks, Wind River Linux, and Wind River Hypervisor.
  • A multi-JTAG connect unit simultaneously debugs up to four scan chains.
  • Auto detection of Linux kernel allows for simplified configuration.